verification environment中文是什么意思

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中文翻译
造句

[网络] 验证平台；验证环境

verification n. 1.证实，证明，确定；核验，验证，核对；检验，校验。 2.【法律】诉状[答辩书]结尾的举证说明。 verification of machines 机器的校准[检定]。
environment n. 1.周围，围绕。 2.围绕物；环境，四周，外界。 3.环境艺术作品；环境戏剧(cf. environmental art)。 natural environment 自然环境。 social environment 社会环境。
of environment 环境适应性
163．verification 核对
account verification 会计鉴定; 帐目鉴定
adequate verification 充分的核查
algorithm verification 算法验证
amplified verification 扩大的核查; 扩大核查
asking for verification 请求确认
base of verification 三角网的基准面
busy verification 占线证实
capital verification 资本验证,验资
cargo verification 货物鉴定
cash verification 现金核实，现金核查; 现金盘查; 现金清查, 现金核实
check verification 支票验证
cognizance, verification 认定
complete verification 全面鉴定, 全部校验
configural verification 构形验证
connectivity verification 连通性校验
continuity verification 连续性验证
control verification 控制检定
credit verification 联合征信
cross-verification 交互检验
data verification 数据验证
decision verification 决策验证; 判定验证

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例句与用法

Simulation and verification are very important stages in soc design . a reusable soc verification environment for hw / sw co-simulation is built
仿真和验证作为soc设计中非常重要的步骤，逐渐被设计师所重视。
Your will set up a testing laboratory and maintain a verification environment for testing of application server products, which involves hardware and software installations, testing support
懒得椅子一句翻译这句了，总之就是：你要负责建立、测试、维护测试环境。
When we build the verification platform, we study the state-of-art commercial verification platform, raise the unified verification environment, and put it into practice
在搭建验证系统时,仔细分析现有商业验证平台,结合它们的设计优点,我们提出了自己的统一验证环境的指导思想。
Furthermore, we design an uml-based software testing and verification environment based on the researches of uml testing and verification, and implement the prototype
此外，根据我们对uml测试和验证的研究成果，设计了一个基于uml的软件测试和验证环境的体系结构，并实现了原型系统。
The x processor verification unified verification environment consists of three parts : software simulation platform, hardware emulation platform and fpga prototype platform . in this project, using our verification method, x processor is well validated
在这一思想的指导下,设计实现了统一环境的系列验证平台,包括软件模拟平台、硬件仿真加速平台以及fpga原型系统平台。
Verification languages offer powerful language platform for verification engineers . they can focus on the expression of verification thought other than the one of language details by using verification languages other than hardware description languages to build verification environment
本文提出通过验证语言而不是硬件描述语言来建立验证环境，帮助验证工程师将时间与精力集中在验证思想的表达上而不是对验证实现细节的表达上。

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Last modified time:Sun, 10 Aug 2025 00:29:56 GMT